The continued scaling of silicon fabrication technology has led to significant reliability concerns, which are quickly becoming a dominant design challenge. Design integrity is threatened by complexity challenges in the form of immense designs defying complete verification, and physical challenges such as silicon aging and soft errors, which impair correct system operation, not to mention security side-channels that can be perpetrated by exploiting the hardware design. CSE researchers working in this space are addressing these key challenges through synergistic research vectors, which range from near-term reliability stress reduction techniques to improve the quality of today's silicon, to longer-term technologies to detect, recover, and repair faulty systems. Moreover, the ability to guarantee the functional correctness of digital integrated circuits and, in particular, complex microprocessors, is a key task in the production of secure and trusted systems. Unfortunately, this goal remains today an unfulfilled challenge, as evidenced by the long errata lists available for commercial microprocessors that list latent bugs not found during the design verification process. To address the challenges of verification, the faculty are turning toward the design of introspective systems capable of recognizing and correcting their errant ways. They are exploring and developing patching techniques that can repair these escaped bugs directly at the customer site, practically making hardware as malleable as software. In addition, they investigate low-cost techniques to validate computation at runtime, in particular techniques that are provably capable of preventing incorrect results.